Joint symbol and chip synchronization for a burst-mode-communication superregenerative MSK receiver

摘要

In this paper we describe a superregenerative (SR)\udMSK receiver able to operate in a burst-mode framework where\udsynchronization is required for each packet. The receiver is based\udon an SR oscillator which provides samples of the incoming\udinstantaneous phase trajectories. We develop a simple yet effective\udtechnique to achieve joint chip and symbol synchronization\udwithin the time limits of a suitable preamble. We develop some\udgeneral results and focus on the case of the IEEE 802.15.4 MSK\udphysical layer. We provide details on a VHDL implementation on\udan FPGA where the most complex digital processing block is an\udaccumulator. Simulation and experimental results are provided\udto validate the described technique.